D Given logic circuit, Then the Boolean expression \(\mathrm{y}=\overline{\mathrm{A}+\overline{\mathrm{B}} \mathrm{C}}\)So, option (d) correct.
VITEEE-2014
Semiconductor Electronics Material Devices and Simple Circuits
151342
To get an OR gate from a NAND gate, we need
1 Only two NAND gates
2 Two NOT gates obtained from NAND gates and one NAND gate
3 Four NAND gates and two AND gates obtained from NAND gates
4 None of the above
Explanation:
B To find OR gate from NAND gate we require circuit combination- Therefore the Boolean expression is- \(\mathrm{y}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}\) \(\mathrm{y}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) \(\mathrm{y}=\mathrm{A}+\mathrm{B}\) which shows OR gate, Therefore, two NOT gate obtained from NAND gate and one NAND gate is required So, option (b) is correct.
VITEEE-2013
Semiconductor Electronics Material Devices and Simple Circuits
151344
Identify the logic gate from the following TRUTH table {lrr} | Inputs Out\)| |---| \(A B \(\)\) \(0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0
1 NOR gat
2 NOT gate
3 AND gate
4 NAND gate
Explanation:
B Given, truth table is, {|c|c|c|} | \(\) \(\) \(\)\)| |---| \( 0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0\) \( Then Boolean expression, \(\mathrm{y}=\overline{\mathrm{A}+\mathrm{B}}\), It is NOR gate which is verified by given truth table
VITEEE-2007
Semiconductor Electronics Material Devices and Simple Circuits
151346
In the following circuit what are \(P\) and \(Q\)
1 \(\mathrm{P}=1, \mathrm{Q}=0\)
2 \(P=0, Q=1\)
3 \(\mathrm{P}=0, \mathrm{Q}=0\)
4 \(\mathrm{P}=1, \mathrm{Q}=1\)
Explanation:
B Given circuit combination In the given circuit active low (S-R Latch) which is NAND gate, So, the output is complimentary to each other therefore \(\mathrm{P}=\overline{1}=0\) \(\mathrm{Q}=\overline{0}=1\) \(\mathrm{P}=0 \mathrm{Q}=1\)
D Given logic circuit, Then the Boolean expression \(\mathrm{y}=\overline{\mathrm{A}+\overline{\mathrm{B}} \mathrm{C}}\)So, option (d) correct.
VITEEE-2014
Semiconductor Electronics Material Devices and Simple Circuits
151342
To get an OR gate from a NAND gate, we need
1 Only two NAND gates
2 Two NOT gates obtained from NAND gates and one NAND gate
3 Four NAND gates and two AND gates obtained from NAND gates
4 None of the above
Explanation:
B To find OR gate from NAND gate we require circuit combination- Therefore the Boolean expression is- \(\mathrm{y}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}\) \(\mathrm{y}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) \(\mathrm{y}=\mathrm{A}+\mathrm{B}\) which shows OR gate, Therefore, two NOT gate obtained from NAND gate and one NAND gate is required So, option (b) is correct.
VITEEE-2013
Semiconductor Electronics Material Devices and Simple Circuits
151344
Identify the logic gate from the following TRUTH table {lrr} | Inputs Out\)| |---| \(A B \(\)\) \(0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0
1 NOR gat
2 NOT gate
3 AND gate
4 NAND gate
Explanation:
B Given, truth table is, {|c|c|c|} | \(\) \(\) \(\)\)| |---| \( 0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0\) \( Then Boolean expression, \(\mathrm{y}=\overline{\mathrm{A}+\mathrm{B}}\), It is NOR gate which is verified by given truth table
VITEEE-2007
Semiconductor Electronics Material Devices and Simple Circuits
151346
In the following circuit what are \(P\) and \(Q\)
1 \(\mathrm{P}=1, \mathrm{Q}=0\)
2 \(P=0, Q=1\)
3 \(\mathrm{P}=0, \mathrm{Q}=0\)
4 \(\mathrm{P}=1, \mathrm{Q}=1\)
Explanation:
B Given circuit combination In the given circuit active low (S-R Latch) which is NAND gate, So, the output is complimentary to each other therefore \(\mathrm{P}=\overline{1}=0\) \(\mathrm{Q}=\overline{0}=1\) \(\mathrm{P}=0 \mathrm{Q}=1\)
D Given logic circuit, Then the Boolean expression \(\mathrm{y}=\overline{\mathrm{A}+\overline{\mathrm{B}} \mathrm{C}}\)So, option (d) correct.
VITEEE-2014
Semiconductor Electronics Material Devices and Simple Circuits
151342
To get an OR gate from a NAND gate, we need
1 Only two NAND gates
2 Two NOT gates obtained from NAND gates and one NAND gate
3 Four NAND gates and two AND gates obtained from NAND gates
4 None of the above
Explanation:
B To find OR gate from NAND gate we require circuit combination- Therefore the Boolean expression is- \(\mathrm{y}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}\) \(\mathrm{y}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) \(\mathrm{y}=\mathrm{A}+\mathrm{B}\) which shows OR gate, Therefore, two NOT gate obtained from NAND gate and one NAND gate is required So, option (b) is correct.
VITEEE-2013
Semiconductor Electronics Material Devices and Simple Circuits
151344
Identify the logic gate from the following TRUTH table {lrr} | Inputs Out\)| |---| \(A B \(\)\) \(0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0
1 NOR gat
2 NOT gate
3 AND gate
4 NAND gate
Explanation:
B Given, truth table is, {|c|c|c|} | \(\) \(\) \(\)\)| |---| \( 0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0\) \( Then Boolean expression, \(\mathrm{y}=\overline{\mathrm{A}+\mathrm{B}}\), It is NOR gate which is verified by given truth table
VITEEE-2007
Semiconductor Electronics Material Devices and Simple Circuits
151346
In the following circuit what are \(P\) and \(Q\)
1 \(\mathrm{P}=1, \mathrm{Q}=0\)
2 \(P=0, Q=1\)
3 \(\mathrm{P}=0, \mathrm{Q}=0\)
4 \(\mathrm{P}=1, \mathrm{Q}=1\)
Explanation:
B Given circuit combination In the given circuit active low (S-R Latch) which is NAND gate, So, the output is complimentary to each other therefore \(\mathrm{P}=\overline{1}=0\) \(\mathrm{Q}=\overline{0}=1\) \(\mathrm{P}=0 \mathrm{Q}=1\)
D Given logic circuit, Then the Boolean expression \(\mathrm{y}=\overline{\mathrm{A}+\overline{\mathrm{B}} \mathrm{C}}\)So, option (d) correct.
VITEEE-2014
Semiconductor Electronics Material Devices and Simple Circuits
151342
To get an OR gate from a NAND gate, we need
1 Only two NAND gates
2 Two NOT gates obtained from NAND gates and one NAND gate
3 Four NAND gates and two AND gates obtained from NAND gates
4 None of the above
Explanation:
B To find OR gate from NAND gate we require circuit combination- Therefore the Boolean expression is- \(\mathrm{y}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}\) \(\mathrm{y}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) \(\mathrm{y}=\mathrm{A}+\mathrm{B}\) which shows OR gate, Therefore, two NOT gate obtained from NAND gate and one NAND gate is required So, option (b) is correct.
VITEEE-2013
Semiconductor Electronics Material Devices and Simple Circuits
151344
Identify the logic gate from the following TRUTH table {lrr} | Inputs Out\)| |---| \(A B \(\)\) \(0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0
1 NOR gat
2 NOT gate
3 AND gate
4 NAND gate
Explanation:
B Given, truth table is, {|c|c|c|} | \(\) \(\) \(\)\)| |---| \( 0 0 1\) \(0 1 0\) \(1 0 0\) \(1 1 0\) \( Then Boolean expression, \(\mathrm{y}=\overline{\mathrm{A}+\mathrm{B}}\), It is NOR gate which is verified by given truth table
VITEEE-2007
Semiconductor Electronics Material Devices and Simple Circuits
151346
In the following circuit what are \(P\) and \(Q\)
1 \(\mathrm{P}=1, \mathrm{Q}=0\)
2 \(P=0, Q=1\)
3 \(\mathrm{P}=0, \mathrm{Q}=0\)
4 \(\mathrm{P}=1, \mathrm{Q}=1\)
Explanation:
B Given circuit combination In the given circuit active low (S-R Latch) which is NAND gate, So, the output is complimentary to each other therefore \(\mathrm{P}=\overline{1}=0\) \(\mathrm{Q}=\overline{0}=1\) \(\mathrm{P}=0 \mathrm{Q}=1\)
