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Semiconductor Electronics Material Devices and Simple Circuits

151263 The output of a NOR gate is HIGH when

1 All inputs are HIGH

2 Any input is HIGH

3 Any input is LOW

4 All inputs are LOW

Explanation:

D The Boolean expression of NOR gate is
$Y = \overset{―}{A + B}$
Truth table of NOR gate is
{|c|c|c|}
| { Input } output\)|
|---|
$$$ $
$001$
$010$
$100$
$110$
$T h e o u t p u t o f N O R g a t e i s h i g h w h e n a l l t h e i n p u t a r e l o w e . g . \((A = 0, B = 0, Y = 1)$

TS- EAMCET.11.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151264 The Boolean expression of the circuit given in figure is
original image

1

Y = A + \overset{―}{B}

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + B

4

Y = A + B

Explanation:

C Given that,
original image
So, the resultant expression for the given circuit is
$y = \overset{―}{A} + B$

TS- EAMCET-10.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151265 The inputs and outputs for different time intervals are given below the NAND gate
{lccc}
| Time Inputs A Inputs B Outputs Y\)|
|---|
${$}_{1}$ tot $_{2}$ 0 1 $
${$}_{2}$ tot $_{3}$ 0 0 $
$Double subscripts: use braces to clarify$ 1 0 \)
${$}_{4}$ tot $_{5}$ 1 1 $
$T h e v a l u e t a k e n b y \(P, Q, R, S$ are respectively

1

1, 1, 1, 0

2

0, 1, 0, 1

3

0, 1, 0, 0

4

1, 0, 1, 1

Explanation:

B Given data, is NAND Gate.\)
$B o o l e a n e x p r e s s i o n f o r N A N D G a t e i s$
$Extra close brace or missing open brace$ }\)
$Misplaced \hline$ }\)
$Misplaced \hline$
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
\(\hline
\end{tabular}

|---|

Semiconductor Electronics Material Devices and Simple Circuits

151266 What is the Boolean equation for the figure?
original image

1

Y = A + B

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + \overset{―}{B}

4

Y = A \cdot B

Explanation:

C original image
We know that,
For AND Gate $Y^{'} = A \cdot B$
$Y = \overset{―}{A \cdot B}$
$Y = \bar{A} + \bar{B}$

Manipal UGET-2017

Semiconductor Electronics Material Devices and Simple Circuits

151263 The output of a NOR gate is HIGH when

1 All inputs are HIGH

2 Any input is HIGH

3 Any input is LOW

4 All inputs are LOW

Explanation:

D The Boolean expression of NOR gate is
$Y = \overset{―}{A + B}$
Truth table of NOR gate is
{|c|c|c|}
| { Input } output\)|
|---|
$$$ $
$001$
$010$
$100$
$110$
$T h e o u t p u t o f N O R g a t e i s h i g h w h e n a l l t h e i n p u t a r e l o w e . g . \((A = 0, B = 0, Y = 1)$

TS- EAMCET.11.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151264 The Boolean expression of the circuit given in figure is
original image

1

Y = A + \overset{―}{B}

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + B

4

Y = A + B

Explanation:

C Given that,
original image
So, the resultant expression for the given circuit is
$y = \overset{―}{A} + B$

TS- EAMCET-10.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151265 The inputs and outputs for different time intervals are given below the NAND gate
{lccc}
| Time Inputs A Inputs B Outputs Y\)|
|---|
${$}_{1}$ tot $_{2}$ 0 1 $
${$}_{2}$ tot $_{3}$ 0 0 $
$Double subscripts: use braces to clarify$ 1 0 \)
${$}_{4}$ tot $_{5}$ 1 1 $
$T h e v a l u e t a k e n b y \(P, Q, R, S$ are respectively

1

1, 1, 1, 0

2

0, 1, 0, 1

3

0, 1, 0, 0

4

1, 0, 1, 1

Explanation:

B Given data, is NAND Gate.\)
$B o o l e a n e x p r e s s i o n f o r N A N D G a t e i s$
$Extra close brace or missing open brace$ }\)
$Misplaced \hline$ }\)
$Misplaced \hline$
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
\(\hline
\end{tabular}

|---|

Semiconductor Electronics Material Devices and Simple Circuits

151266 What is the Boolean equation for the figure?
original image

1

Y = A + B

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + \overset{―}{B}

4

Y = A \cdot B

Explanation:

C original image
We know that,
For AND Gate $Y^{'} = A \cdot B$
$Y = \overset{―}{A \cdot B}$
$Y = \bar{A} + \bar{B}$

Manipal UGET-2017

Semiconductor Electronics Material Devices and Simple Circuits

151263 The output of a NOR gate is HIGH when

1 All inputs are HIGH

2 Any input is HIGH

3 Any input is LOW

4 All inputs are LOW

Explanation:

D The Boolean expression of NOR gate is
$Y = \overset{―}{A + B}$
Truth table of NOR gate is
{|c|c|c|}
| { Input } output\)|
|---|
$$$ $
$001$
$010$
$100$
$110$
$T h e o u t p u t o f N O R g a t e i s h i g h w h e n a l l t h e i n p u t a r e l o w e . g . \((A = 0, B = 0, Y = 1)$

TS- EAMCET.11.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151264 The Boolean expression of the circuit given in figure is
original image

1

Y = A + \overset{―}{B}

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + B

4

Y = A + B

Explanation:

C Given that,
original image
So, the resultant expression for the given circuit is
$y = \overset{―}{A} + B$

TS- EAMCET-10.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151265 The inputs and outputs for different time intervals are given below the NAND gate
{lccc}
| Time Inputs A Inputs B Outputs Y\)|
|---|
${$}_{1}$ tot $_{2}$ 0 1 $
${$}_{2}$ tot $_{3}$ 0 0 $
$Double subscripts: use braces to clarify$ 1 0 \)
${$}_{4}$ tot $_{5}$ 1 1 $
$T h e v a l u e t a k e n b y \(P, Q, R, S$ are respectively

1

1, 1, 1, 0

2

0, 1, 0, 1

3

0, 1, 0, 0

4

1, 0, 1, 1

Explanation:

B Given data, is NAND Gate.\)
$B o o l e a n e x p r e s s i o n f o r N A N D G a t e i s$
$Extra close brace or missing open brace$ }\)
$Misplaced \hline$ }\)
$Misplaced \hline$
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
\(\hline
\end{tabular}

|---|

Semiconductor Electronics Material Devices and Simple Circuits

151266 What is the Boolean equation for the figure?
original image

1

Y = A + B

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + \overset{―}{B}

4

Y = A \cdot B

Explanation:

C original image
We know that,
For AND Gate $Y^{'} = A \cdot B$
$Y = \overset{―}{A \cdot B}$
$Y = \bar{A} + \bar{B}$

Manipal UGET-2017

Semiconductor Electronics Material Devices and Simple Circuits

151263 The output of a NOR gate is HIGH when

1 All inputs are HIGH

2 Any input is HIGH

3 Any input is LOW

4 All inputs are LOW

Explanation:

D The Boolean expression of NOR gate is
$Y = \overset{―}{A + B}$
Truth table of NOR gate is
{|c|c|c|}
| { Input } output\)|
|---|
$$$ $
$001$
$010$
$100$
$110$
$T h e o u t p u t o f N O R g a t e i s h i g h w h e n a l l t h e i n p u t a r e l o w e . g . \((A = 0, B = 0, Y = 1)$

TS- EAMCET.11.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151264 The Boolean expression of the circuit given in figure is
original image

1

Y = A + \overset{―}{B}

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + B

4

Y = A + B

Explanation:

C Given that,
original image
So, the resultant expression for the given circuit is
$y = \overset{―}{A} + B$

TS- EAMCET-10.09.2020

Semiconductor Electronics Material Devices and Simple Circuits

151265 The inputs and outputs for different time intervals are given below the NAND gate
{lccc}
| Time Inputs A Inputs B Outputs Y\)|
|---|
${$}_{1}$ tot $_{2}$ 0 1 $
${$}_{2}$ tot $_{3}$ 0 0 $
$Double subscripts: use braces to clarify$ 1 0 \)
${$}_{4}$ tot $_{5}$ 1 1 $
$T h e v a l u e t a k e n b y \(P, Q, R, S$ are respectively

1

1, 1, 1, 0

2

0, 1, 0, 1

3

0, 1, 0, 0

4

1, 0, 1, 1

Explanation:

B Given data, is NAND Gate.\)
$B o o l e a n e x p r e s s i o n f o r N A N D G a t e i s$
$Extra close brace or missing open brace$ }\)
$Misplaced \hline$ }\)
$Misplaced \hline$
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
$Misplaced \hline$ \)
\(\hline
\end{tabular}

|---|

Semiconductor Electronics Material Devices and Simple Circuits

151266 What is the Boolean equation for the figure?
original image

1

Y = A + B

2

Y = \overset{―}{A + B}

3

Y = \overset{―}{A} + \overset{―}{B}

4

Y = A \cdot B

Explanation:

C original image
We know that,
For AND Gate $Y^{'} = A \cdot B$
$Y = \overset{―}{A \cdot B}$
$Y = \bar{A} + \bar{B}$

Manipal UGET-2017

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