Semiconductor Electronics Material Devices and Simple Circuits
151267
The following configuration of gate is equivalent to
1 NAND
2 XOR
3 OR
4 None of theses
Explanation:
B \(y =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{AB}})\) \(\mathrm{y} =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{A}}+\overline{\mathrm{B}}) \quad[\therefore \text { De Morgan's theorem }]\) \(\mathrm{y} =\mathrm{A} \overline{\mathrm{A}}+\mathrm{A} \overline{\mathrm{B}}+\mathrm{B} \overline{\mathrm{A}}+\mathrm{B} \overline{\mathrm{B}}\) \(\mathrm{y} =0+\mathrm{A} \overline{\mathrm{B}}+\overline{\mathrm{A}} \mathrm{B}+0 \quad[\therefore \mathrm{X} \overline{\mathrm{X}}=0]\) \(\mathrm{y} =\overline{\mathrm{A}} \mathrm{B}+\mathrm{A} \overline{\mathrm{B}}\)This is the expression of an XOR gate.
Manipal UGET-2015
Semiconductor Electronics Material Devices and Simple Circuits
151270
The given combination represents the following gate
1 OR
2 XOR
3 NAND
4 NOR
Explanation:
B The given combination performs the function of an OR gate. As, per the combination, \(\mathrm{Y} =\overline{(\overline{\mathrm{A} \cdot \mathrm{A}}) \cdot(\overline{\mathrm{B} \cdot \mathrm{B}})}\) \(\mathrm{Y} =\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) Using de-Morgan's law, \(\mathrm{Y}=\mathrm{A}+\mathrm{B}\)Which is represent of OR gate.
Manipal UGET-2010
Semiconductor Electronics Material Devices and Simple Circuits
151271
The Binary Coded Decimal (BCD) equivalent of 429
1 111001110
2 010000101001
3 110101101
4 0100101001
Explanation:
C To convert decimal to binary we divide progressively the decimal number by 2 and write down remainder after each division. The remainder take in reverse order. Form the binary number {c|c} |2 \(429-1\)\)| |---| \( 2 \(214-0\)\) \( 2 \(107-1\)\) \( 2 \(53-1\)\) \( 2 \(26-0\)\) \( 2 \(13-1\)\) \( 2 \(6-0\)\) \( 2 \(3-1\)\) \( \(1-1\) Hence, Binary coded decimal equivalent of 429 is 110101101 .
CG PET- 2009
Semiconductor Electronics Material Devices and Simple Circuits
151272
The two combinations of NAND gates shown in the figure are equivalent to (i) (ii)
1 (i) -OR gate, (ii) - AND gate
2 (i) -AND gate, (ii) -NOT gate
3 (i)-NOT gate, (ii) -AND gate
4 (i)-AND gate, (ii) -OR gate
Explanation:
B Case-I \(\mathrm{C}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B} \quad \text { (De Morgans theorem) }\) So, the circuit is equivalent to OR gate. Case-II \(\mathrm{C} =\overline{\overline{\mathrm{AB}} \cdot \overline{\mathrm{AB}}}\) \(=\mathrm{AB}+\mathrm{AB}\) \(=\mathrm{AB}\)Hence, the circuit is equivalent to AND gate.
Semiconductor Electronics Material Devices and Simple Circuits
151267
The following configuration of gate is equivalent to
1 NAND
2 XOR
3 OR
4 None of theses
Explanation:
B \(y =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{AB}})\) \(\mathrm{y} =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{A}}+\overline{\mathrm{B}}) \quad[\therefore \text { De Morgan's theorem }]\) \(\mathrm{y} =\mathrm{A} \overline{\mathrm{A}}+\mathrm{A} \overline{\mathrm{B}}+\mathrm{B} \overline{\mathrm{A}}+\mathrm{B} \overline{\mathrm{B}}\) \(\mathrm{y} =0+\mathrm{A} \overline{\mathrm{B}}+\overline{\mathrm{A}} \mathrm{B}+0 \quad[\therefore \mathrm{X} \overline{\mathrm{X}}=0]\) \(\mathrm{y} =\overline{\mathrm{A}} \mathrm{B}+\mathrm{A} \overline{\mathrm{B}}\)This is the expression of an XOR gate.
Manipal UGET-2015
Semiconductor Electronics Material Devices and Simple Circuits
151270
The given combination represents the following gate
1 OR
2 XOR
3 NAND
4 NOR
Explanation:
B The given combination performs the function of an OR gate. As, per the combination, \(\mathrm{Y} =\overline{(\overline{\mathrm{A} \cdot \mathrm{A}}) \cdot(\overline{\mathrm{B} \cdot \mathrm{B}})}\) \(\mathrm{Y} =\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) Using de-Morgan's law, \(\mathrm{Y}=\mathrm{A}+\mathrm{B}\)Which is represent of OR gate.
Manipal UGET-2010
Semiconductor Electronics Material Devices and Simple Circuits
151271
The Binary Coded Decimal (BCD) equivalent of 429
1 111001110
2 010000101001
3 110101101
4 0100101001
Explanation:
C To convert decimal to binary we divide progressively the decimal number by 2 and write down remainder after each division. The remainder take in reverse order. Form the binary number {c|c} |2 \(429-1\)\)| |---| \( 2 \(214-0\)\) \( 2 \(107-1\)\) \( 2 \(53-1\)\) \( 2 \(26-0\)\) \( 2 \(13-1\)\) \( 2 \(6-0\)\) \( 2 \(3-1\)\) \( \(1-1\) Hence, Binary coded decimal equivalent of 429 is 110101101 .
CG PET- 2009
Semiconductor Electronics Material Devices and Simple Circuits
151272
The two combinations of NAND gates shown in the figure are equivalent to (i) (ii)
1 (i) -OR gate, (ii) - AND gate
2 (i) -AND gate, (ii) -NOT gate
3 (i)-NOT gate, (ii) -AND gate
4 (i)-AND gate, (ii) -OR gate
Explanation:
B Case-I \(\mathrm{C}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B} \quad \text { (De Morgans theorem) }\) So, the circuit is equivalent to OR gate. Case-II \(\mathrm{C} =\overline{\overline{\mathrm{AB}} \cdot \overline{\mathrm{AB}}}\) \(=\mathrm{AB}+\mathrm{AB}\) \(=\mathrm{AB}\)Hence, the circuit is equivalent to AND gate.
Semiconductor Electronics Material Devices and Simple Circuits
151267
The following configuration of gate is equivalent to
1 NAND
2 XOR
3 OR
4 None of theses
Explanation:
B \(y =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{AB}})\) \(\mathrm{y} =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{A}}+\overline{\mathrm{B}}) \quad[\therefore \text { De Morgan's theorem }]\) \(\mathrm{y} =\mathrm{A} \overline{\mathrm{A}}+\mathrm{A} \overline{\mathrm{B}}+\mathrm{B} \overline{\mathrm{A}}+\mathrm{B} \overline{\mathrm{B}}\) \(\mathrm{y} =0+\mathrm{A} \overline{\mathrm{B}}+\overline{\mathrm{A}} \mathrm{B}+0 \quad[\therefore \mathrm{X} \overline{\mathrm{X}}=0]\) \(\mathrm{y} =\overline{\mathrm{A}} \mathrm{B}+\mathrm{A} \overline{\mathrm{B}}\)This is the expression of an XOR gate.
Manipal UGET-2015
Semiconductor Electronics Material Devices and Simple Circuits
151270
The given combination represents the following gate
1 OR
2 XOR
3 NAND
4 NOR
Explanation:
B The given combination performs the function of an OR gate. As, per the combination, \(\mathrm{Y} =\overline{(\overline{\mathrm{A} \cdot \mathrm{A}}) \cdot(\overline{\mathrm{B} \cdot \mathrm{B}})}\) \(\mathrm{Y} =\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) Using de-Morgan's law, \(\mathrm{Y}=\mathrm{A}+\mathrm{B}\)Which is represent of OR gate.
Manipal UGET-2010
Semiconductor Electronics Material Devices and Simple Circuits
151271
The Binary Coded Decimal (BCD) equivalent of 429
1 111001110
2 010000101001
3 110101101
4 0100101001
Explanation:
C To convert decimal to binary we divide progressively the decimal number by 2 and write down remainder after each division. The remainder take in reverse order. Form the binary number {c|c} |2 \(429-1\)\)| |---| \( 2 \(214-0\)\) \( 2 \(107-1\)\) \( 2 \(53-1\)\) \( 2 \(26-0\)\) \( 2 \(13-1\)\) \( 2 \(6-0\)\) \( 2 \(3-1\)\) \( \(1-1\) Hence, Binary coded decimal equivalent of 429 is 110101101 .
CG PET- 2009
Semiconductor Electronics Material Devices and Simple Circuits
151272
The two combinations of NAND gates shown in the figure are equivalent to (i) (ii)
1 (i) -OR gate, (ii) - AND gate
2 (i) -AND gate, (ii) -NOT gate
3 (i)-NOT gate, (ii) -AND gate
4 (i)-AND gate, (ii) -OR gate
Explanation:
B Case-I \(\mathrm{C}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B} \quad \text { (De Morgans theorem) }\) So, the circuit is equivalent to OR gate. Case-II \(\mathrm{C} =\overline{\overline{\mathrm{AB}} \cdot \overline{\mathrm{AB}}}\) \(=\mathrm{AB}+\mathrm{AB}\) \(=\mathrm{AB}\)Hence, the circuit is equivalent to AND gate.
Semiconductor Electronics Material Devices and Simple Circuits
151267
The following configuration of gate is equivalent to
1 NAND
2 XOR
3 OR
4 None of theses
Explanation:
B \(y =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{AB}})\) \(\mathrm{y} =(\mathrm{A}+\mathrm{B}) \cdot(\overline{\mathrm{A}}+\overline{\mathrm{B}}) \quad[\therefore \text { De Morgan's theorem }]\) \(\mathrm{y} =\mathrm{A} \overline{\mathrm{A}}+\mathrm{A} \overline{\mathrm{B}}+\mathrm{B} \overline{\mathrm{A}}+\mathrm{B} \overline{\mathrm{B}}\) \(\mathrm{y} =0+\mathrm{A} \overline{\mathrm{B}}+\overline{\mathrm{A}} \mathrm{B}+0 \quad[\therefore \mathrm{X} \overline{\mathrm{X}}=0]\) \(\mathrm{y} =\overline{\mathrm{A}} \mathrm{B}+\mathrm{A} \overline{\mathrm{B}}\)This is the expression of an XOR gate.
Manipal UGET-2015
Semiconductor Electronics Material Devices and Simple Circuits
151270
The given combination represents the following gate
1 OR
2 XOR
3 NAND
4 NOR
Explanation:
B The given combination performs the function of an OR gate. As, per the combination, \(\mathrm{Y} =\overline{(\overline{\mathrm{A} \cdot \mathrm{A}}) \cdot(\overline{\mathrm{B} \cdot \mathrm{B}})}\) \(\mathrm{Y} =\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}\) Using de-Morgan's law, \(\mathrm{Y}=\mathrm{A}+\mathrm{B}\)Which is represent of OR gate.
Manipal UGET-2010
Semiconductor Electronics Material Devices and Simple Circuits
151271
The Binary Coded Decimal (BCD) equivalent of 429
1 111001110
2 010000101001
3 110101101
4 0100101001
Explanation:
C To convert decimal to binary we divide progressively the decimal number by 2 and write down remainder after each division. The remainder take in reverse order. Form the binary number {c|c} |2 \(429-1\)\)| |---| \( 2 \(214-0\)\) \( 2 \(107-1\)\) \( 2 \(53-1\)\) \( 2 \(26-0\)\) \( 2 \(13-1\)\) \( 2 \(6-0\)\) \( 2 \(3-1\)\) \( \(1-1\) Hence, Binary coded decimal equivalent of 429 is 110101101 .
CG PET- 2009
Semiconductor Electronics Material Devices and Simple Circuits
151272
The two combinations of NAND gates shown in the figure are equivalent to (i) (ii)
1 (i) -OR gate, (ii) - AND gate
2 (i) -AND gate, (ii) -NOT gate
3 (i)-NOT gate, (ii) -AND gate
4 (i)-AND gate, (ii) -OR gate
Explanation:
B Case-I \(\mathrm{C}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B} \quad \text { (De Morgans theorem) }\) So, the circuit is equivalent to OR gate. Case-II \(\mathrm{C} =\overline{\overline{\mathrm{AB}} \cdot \overline{\mathrm{AB}}}\) \(=\mathrm{AB}+\mathrm{AB}\) \(=\mathrm{AB}\)Hence, the circuit is equivalent to AND gate.
