Semiconductor Electronics Material Devices and Simple Circuits
151288
For which one of the following input combinations, the given logic circuit gives the output \(\mathrm{Y}=1\) ?
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=0\)
2 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=1\)
5 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C For the given logic circuit the output is \(\begin{array}{r} \mathrm{Y}=\overline{\overline{\mathrm{A} \cdot \mathrm{B}}+\overline{\mathrm{C}}}=\overline{\mathrm{A}} \cdot \mathrm{B} \cdot \mathrm{C}\) \({[\overline{\mathrm{A}+\mathrm{B}}=\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}, \quad \text { Demorgan 's law }]} \end{array}\)When, \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\), then \(\mathrm{Y}=1 \quad[\because \overline{\mathrm{A}}=1]\)
Kerala CEE - 2015
Semiconductor Electronics Material Devices and Simple Circuits
151289
The waveforms \(A\) and \(B\) given below are given as input to NAND gate. then, its logic output \(y\) is
1 for \(t_1\) to \(t_2 ; y=0\)
2 for \(t_2\) to \(t_3 ; y=1\)
3 for \(t_3\) to \(t_4 ; y=1\)
4 for \(t_4\) to \(t_5 ; y=0\)
5 for \(t_5\) to \(t_6 ; y=0\)
Explanation:
C NAND gate is the combination of AND and NOT gate and the output of two inputs of NAND gate is \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}}=\overline{\mathrm{A}}+\overline{\mathrm{B}}\) So, truth table of NAND gate is {|c|c|c|c|} | Time \(A\) \(B\) \(Y\)\)| |---| \(\(t_1\) to \(_2\) 1 0 1\) \( \(_2\) to \(_3\) 1 1 0\) \( \(_3\) to \(_4\) 0 1 1\) \( \(_4\) to \(_5\) 0 0 1\) \( \(_5\) to \(_6\) 1 0 1\) \(
Kerala CEE- 2013
Semiconductor Electronics Material Devices and Simple Circuits
151291
The truth table for the following logic circuit is
Semiconductor Electronics Material Devices and Simple Circuits
151293
The real time variation of input signals \(A\) and \(B\) are as shown below. If the inputs are fed into NAND gate, then select the output signal from the following
1
2
3
4
Explanation:
B From real time variation of input signals we can form truth table for A and B and conclude output from NAND gate. Truth table of NAND gate are, {|c|c|c|} | { Input } output\)| |---| \( \(\) \(\) \(= }\)\) \( 0 0 1\) \( 1 0 1\) \( 0 0 1\) \( 1 1 0\) \( From output we can show real time variation of output as below-
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Semiconductor Electronics Material Devices and Simple Circuits
151288
For which one of the following input combinations, the given logic circuit gives the output \(\mathrm{Y}=1\) ?
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=0\)
2 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=1\)
5 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C For the given logic circuit the output is \(\begin{array}{r} \mathrm{Y}=\overline{\overline{\mathrm{A} \cdot \mathrm{B}}+\overline{\mathrm{C}}}=\overline{\mathrm{A}} \cdot \mathrm{B} \cdot \mathrm{C}\) \({[\overline{\mathrm{A}+\mathrm{B}}=\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}, \quad \text { Demorgan 's law }]} \end{array}\)When, \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\), then \(\mathrm{Y}=1 \quad[\because \overline{\mathrm{A}}=1]\)
Kerala CEE - 2015
Semiconductor Electronics Material Devices and Simple Circuits
151289
The waveforms \(A\) and \(B\) given below are given as input to NAND gate. then, its logic output \(y\) is
1 for \(t_1\) to \(t_2 ; y=0\)
2 for \(t_2\) to \(t_3 ; y=1\)
3 for \(t_3\) to \(t_4 ; y=1\)
4 for \(t_4\) to \(t_5 ; y=0\)
5 for \(t_5\) to \(t_6 ; y=0\)
Explanation:
C NAND gate is the combination of AND and NOT gate and the output of two inputs of NAND gate is \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}}=\overline{\mathrm{A}}+\overline{\mathrm{B}}\) So, truth table of NAND gate is {|c|c|c|c|} | Time \(A\) \(B\) \(Y\)\)| |---| \(\(t_1\) to \(_2\) 1 0 1\) \( \(_2\) to \(_3\) 1 1 0\) \( \(_3\) to \(_4\) 0 1 1\) \( \(_4\) to \(_5\) 0 0 1\) \( \(_5\) to \(_6\) 1 0 1\) \(
Kerala CEE- 2013
Semiconductor Electronics Material Devices and Simple Circuits
151291
The truth table for the following logic circuit is
Semiconductor Electronics Material Devices and Simple Circuits
151293
The real time variation of input signals \(A\) and \(B\) are as shown below. If the inputs are fed into NAND gate, then select the output signal from the following
1
2
3
4
Explanation:
B From real time variation of input signals we can form truth table for A and B and conclude output from NAND gate. Truth table of NAND gate are, {|c|c|c|} | { Input } output\)| |---| \( \(\) \(\) \(= }\)\) \( 0 0 1\) \( 1 0 1\) \( 0 0 1\) \( 1 1 0\) \( From output we can show real time variation of output as below-
Semiconductor Electronics Material Devices and Simple Circuits
151288
For which one of the following input combinations, the given logic circuit gives the output \(\mathrm{Y}=1\) ?
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=0\)
2 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=1\)
5 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C For the given logic circuit the output is \(\begin{array}{r} \mathrm{Y}=\overline{\overline{\mathrm{A} \cdot \mathrm{B}}+\overline{\mathrm{C}}}=\overline{\mathrm{A}} \cdot \mathrm{B} \cdot \mathrm{C}\) \({[\overline{\mathrm{A}+\mathrm{B}}=\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}, \quad \text { Demorgan 's law }]} \end{array}\)When, \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\), then \(\mathrm{Y}=1 \quad[\because \overline{\mathrm{A}}=1]\)
Kerala CEE - 2015
Semiconductor Electronics Material Devices and Simple Circuits
151289
The waveforms \(A\) and \(B\) given below are given as input to NAND gate. then, its logic output \(y\) is
1 for \(t_1\) to \(t_2 ; y=0\)
2 for \(t_2\) to \(t_3 ; y=1\)
3 for \(t_3\) to \(t_4 ; y=1\)
4 for \(t_4\) to \(t_5 ; y=0\)
5 for \(t_5\) to \(t_6 ; y=0\)
Explanation:
C NAND gate is the combination of AND and NOT gate and the output of two inputs of NAND gate is \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}}=\overline{\mathrm{A}}+\overline{\mathrm{B}}\) So, truth table of NAND gate is {|c|c|c|c|} | Time \(A\) \(B\) \(Y\)\)| |---| \(\(t_1\) to \(_2\) 1 0 1\) \( \(_2\) to \(_3\) 1 1 0\) \( \(_3\) to \(_4\) 0 1 1\) \( \(_4\) to \(_5\) 0 0 1\) \( \(_5\) to \(_6\) 1 0 1\) \(
Kerala CEE- 2013
Semiconductor Electronics Material Devices and Simple Circuits
151291
The truth table for the following logic circuit is
Semiconductor Electronics Material Devices and Simple Circuits
151293
The real time variation of input signals \(A\) and \(B\) are as shown below. If the inputs are fed into NAND gate, then select the output signal from the following
1
2
3
4
Explanation:
B From real time variation of input signals we can form truth table for A and B and conclude output from NAND gate. Truth table of NAND gate are, {|c|c|c|} | { Input } output\)| |---| \( \(\) \(\) \(= }\)\) \( 0 0 1\) \( 1 0 1\) \( 0 0 1\) \( 1 1 0\) \( From output we can show real time variation of output as below-
Semiconductor Electronics Material Devices and Simple Circuits
151288
For which one of the following input combinations, the given logic circuit gives the output \(\mathrm{Y}=1\) ?
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=0\)
2 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=1\)
5 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C For the given logic circuit the output is \(\begin{array}{r} \mathrm{Y}=\overline{\overline{\mathrm{A} \cdot \mathrm{B}}+\overline{\mathrm{C}}}=\overline{\mathrm{A}} \cdot \mathrm{B} \cdot \mathrm{C}\) \({[\overline{\mathrm{A}+\mathrm{B}}=\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}, \quad \text { Demorgan 's law }]} \end{array}\)When, \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\), then \(\mathrm{Y}=1 \quad[\because \overline{\mathrm{A}}=1]\)
Kerala CEE - 2015
Semiconductor Electronics Material Devices and Simple Circuits
151289
The waveforms \(A\) and \(B\) given below are given as input to NAND gate. then, its logic output \(y\) is
1 for \(t_1\) to \(t_2 ; y=0\)
2 for \(t_2\) to \(t_3 ; y=1\)
3 for \(t_3\) to \(t_4 ; y=1\)
4 for \(t_4\) to \(t_5 ; y=0\)
5 for \(t_5\) to \(t_6 ; y=0\)
Explanation:
C NAND gate is the combination of AND and NOT gate and the output of two inputs of NAND gate is \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}}=\overline{\mathrm{A}}+\overline{\mathrm{B}}\) So, truth table of NAND gate is {|c|c|c|c|} | Time \(A\) \(B\) \(Y\)\)| |---| \(\(t_1\) to \(_2\) 1 0 1\) \( \(_2\) to \(_3\) 1 1 0\) \( \(_3\) to \(_4\) 0 1 1\) \( \(_4\) to \(_5\) 0 0 1\) \( \(_5\) to \(_6\) 1 0 1\) \(
Kerala CEE- 2013
Semiconductor Electronics Material Devices and Simple Circuits
151291
The truth table for the following logic circuit is
Semiconductor Electronics Material Devices and Simple Circuits
151293
The real time variation of input signals \(A\) and \(B\) are as shown below. If the inputs are fed into NAND gate, then select the output signal from the following
1
2
3
4
Explanation:
B From real time variation of input signals we can form truth table for A and B and conclude output from NAND gate. Truth table of NAND gate are, {|c|c|c|} | { Input } output\)| |---| \( \(\) \(\) \(= }\)\) \( 0 0 1\) \( 1 0 1\) \( 0 0 1\) \( 1 1 0\) \( From output we can show real time variation of output as below-
