Semiconductor Electronics Material Devices and Simple Circuits
151389
Identify the correct option if \(A\) and \(B\) are inputs and \(\mathrm{C}\) is the output in the following logic circuit.
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=1\)
2 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C If (a) \(\mathrm{A}=0, \mathrm{~B}=0, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{A} \cdot \mathrm{B}=0.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \cdot \mathrm{B}=1.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\) (b) \(\mathrm{A}=1, \mathrm{~B}=1, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.1=1\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.1=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=1+0=1\) (c) If \(\text { If } \mathrm{A}=0, \mathrm{~B}=1, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{AB}=0.1=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=1.1=1\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+1=1\) \(\therefore \quad \mathrm{C}=0+1=1\) (d) \(\mathrm{A}=1, \mathrm{~B}=0, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\)So, here option (c) is correct.
TS EAMCET 31.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151390
In the following logic circuit. \(\mathrm{C}=\mathrm{D}=\mathrm{E}=0\); for what values of \(A\) and \(B\) the output \(Y=1\)
1 Only for \(\mathrm{A}=0, \mathrm{~B}=0\)
2 Only for \(\mathrm{A}=0, \mathrm{~B}=1\)
3 Only for \(\mathrm{B}=1, \mathrm{~A}=0\)
4 For any values of A and B
Explanation:
D Using the De-Margon theorem, \(Y=\overline{\overline{\overline{A \cdot B} \cdot C} \cdot D \cdot E}\) \(Y=\overline{\overline{\bar{A} \cdot \mathrm{B}} \cdot \mathrm{C}}+\overline{\mathrm{D} \cdot \mathrm{E}}\) \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot \mathrm{C}+(\overline{\mathrm{D}}+\overline{\mathrm{E}})\) For any value of \(A, B\), when the value of \(D\) and \(E\) are zero then, \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot 0+(\overline{0}+\overline{0})\) \(\mathrm{Y}=0+(1+1)\) \(Y=1\)
TS EAMCET 30.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151391
The logic operation of the circuit given below is
1 \(\mathrm{OR}\)
2 NAND
3 AND
4 NOR
Explanation:
B \(\mathrm{Y}=\overline{\overline{\mathrm{A}+\mathrm{B}}}=\mathrm{A}+\mathrm{B}\)
TS EAMCET 02.05.2018
Semiconductor Electronics Material Devices and Simple Circuits
151392
The minimum number of 2-input NAND gates required to implement a NOR gate:
1 2
2 3
3 4
4 5
Explanation:
C Trick for number of NAND (or) NOR gate required to make different gate \(\mathrm{X}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B}\) {|c|c|c|} | Logic Min. Number of NOR \(\) Min. Number of NAND \(=4\)\)| |---| \( NOT 1 1\) \( AND 2 3\) \( OR 3 2\) \( EX-OR 4 5\) \( EX-NOR 5 4\) \( ( \(\because 4\) No. of NAND gate required to build NOR gate)
Semiconductor Electronics Material Devices and Simple Circuits
151389
Identify the correct option if \(A\) and \(B\) are inputs and \(\mathrm{C}\) is the output in the following logic circuit.
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=1\)
2 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C If (a) \(\mathrm{A}=0, \mathrm{~B}=0, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{A} \cdot \mathrm{B}=0.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \cdot \mathrm{B}=1.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\) (b) \(\mathrm{A}=1, \mathrm{~B}=1, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.1=1\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.1=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=1+0=1\) (c) If \(\text { If } \mathrm{A}=0, \mathrm{~B}=1, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{AB}=0.1=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=1.1=1\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+1=1\) \(\therefore \quad \mathrm{C}=0+1=1\) (d) \(\mathrm{A}=1, \mathrm{~B}=0, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\)So, here option (c) is correct.
TS EAMCET 31.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151390
In the following logic circuit. \(\mathrm{C}=\mathrm{D}=\mathrm{E}=0\); for what values of \(A\) and \(B\) the output \(Y=1\)
1 Only for \(\mathrm{A}=0, \mathrm{~B}=0\)
2 Only for \(\mathrm{A}=0, \mathrm{~B}=1\)
3 Only for \(\mathrm{B}=1, \mathrm{~A}=0\)
4 For any values of A and B
Explanation:
D Using the De-Margon theorem, \(Y=\overline{\overline{\overline{A \cdot B} \cdot C} \cdot D \cdot E}\) \(Y=\overline{\overline{\bar{A} \cdot \mathrm{B}} \cdot \mathrm{C}}+\overline{\mathrm{D} \cdot \mathrm{E}}\) \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot \mathrm{C}+(\overline{\mathrm{D}}+\overline{\mathrm{E}})\) For any value of \(A, B\), when the value of \(D\) and \(E\) are zero then, \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot 0+(\overline{0}+\overline{0})\) \(\mathrm{Y}=0+(1+1)\) \(Y=1\)
TS EAMCET 30.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151391
The logic operation of the circuit given below is
1 \(\mathrm{OR}\)
2 NAND
3 AND
4 NOR
Explanation:
B \(\mathrm{Y}=\overline{\overline{\mathrm{A}+\mathrm{B}}}=\mathrm{A}+\mathrm{B}\)
TS EAMCET 02.05.2018
Semiconductor Electronics Material Devices and Simple Circuits
151392
The minimum number of 2-input NAND gates required to implement a NOR gate:
1 2
2 3
3 4
4 5
Explanation:
C Trick for number of NAND (or) NOR gate required to make different gate \(\mathrm{X}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B}\) {|c|c|c|} | Logic Min. Number of NOR \(\) Min. Number of NAND \(=4\)\)| |---| \( NOT 1 1\) \( AND 2 3\) \( OR 3 2\) \( EX-OR 4 5\) \( EX-NOR 5 4\) \( ( \(\because 4\) No. of NAND gate required to build NOR gate)
Semiconductor Electronics Material Devices and Simple Circuits
151389
Identify the correct option if \(A\) and \(B\) are inputs and \(\mathrm{C}\) is the output in the following logic circuit.
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=1\)
2 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C If (a) \(\mathrm{A}=0, \mathrm{~B}=0, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{A} \cdot \mathrm{B}=0.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \cdot \mathrm{B}=1.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\) (b) \(\mathrm{A}=1, \mathrm{~B}=1, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.1=1\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.1=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=1+0=1\) (c) If \(\text { If } \mathrm{A}=0, \mathrm{~B}=1, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{AB}=0.1=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=1.1=1\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+1=1\) \(\therefore \quad \mathrm{C}=0+1=1\) (d) \(\mathrm{A}=1, \mathrm{~B}=0, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\)So, here option (c) is correct.
TS EAMCET 31.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151390
In the following logic circuit. \(\mathrm{C}=\mathrm{D}=\mathrm{E}=0\); for what values of \(A\) and \(B\) the output \(Y=1\)
1 Only for \(\mathrm{A}=0, \mathrm{~B}=0\)
2 Only for \(\mathrm{A}=0, \mathrm{~B}=1\)
3 Only for \(\mathrm{B}=1, \mathrm{~A}=0\)
4 For any values of A and B
Explanation:
D Using the De-Margon theorem, \(Y=\overline{\overline{\overline{A \cdot B} \cdot C} \cdot D \cdot E}\) \(Y=\overline{\overline{\bar{A} \cdot \mathrm{B}} \cdot \mathrm{C}}+\overline{\mathrm{D} \cdot \mathrm{E}}\) \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot \mathrm{C}+(\overline{\mathrm{D}}+\overline{\mathrm{E}})\) For any value of \(A, B\), when the value of \(D\) and \(E\) are zero then, \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot 0+(\overline{0}+\overline{0})\) \(\mathrm{Y}=0+(1+1)\) \(Y=1\)
TS EAMCET 30.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151391
The logic operation of the circuit given below is
1 \(\mathrm{OR}\)
2 NAND
3 AND
4 NOR
Explanation:
B \(\mathrm{Y}=\overline{\overline{\mathrm{A}+\mathrm{B}}}=\mathrm{A}+\mathrm{B}\)
TS EAMCET 02.05.2018
Semiconductor Electronics Material Devices and Simple Circuits
151392
The minimum number of 2-input NAND gates required to implement a NOR gate:
1 2
2 3
3 4
4 5
Explanation:
C Trick for number of NAND (or) NOR gate required to make different gate \(\mathrm{X}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B}\) {|c|c|c|} | Logic Min. Number of NOR \(\) Min. Number of NAND \(=4\)\)| |---| \( NOT 1 1\) \( AND 2 3\) \( OR 3 2\) \( EX-OR 4 5\) \( EX-NOR 5 4\) \( ( \(\because 4\) No. of NAND gate required to build NOR gate)
Semiconductor Electronics Material Devices and Simple Circuits
151389
Identify the correct option if \(A\) and \(B\) are inputs and \(\mathrm{C}\) is the output in the following logic circuit.
1 \(\mathrm{A}=0, \mathrm{~B}=0, \mathrm{C}=1\)
2 \(\mathrm{A}=1, \mathrm{~B}=1, \mathrm{C}=0\)
3 \(\mathrm{A}=0, \mathrm{~B}=1, \mathrm{C}=1\)
4 \(\mathrm{A}=1, \mathrm{~B}=0, \mathrm{C}=1\)
Explanation:
C If (a) \(\mathrm{A}=0, \mathrm{~B}=0, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{A} \cdot \mathrm{B}=0.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \cdot \mathrm{B}=1.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\) (b) \(\mathrm{A}=1, \mathrm{~B}=1, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.1=1\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.1=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=1+0=1\) (c) If \(\text { If } \mathrm{A}=0, \mathrm{~B}=1, \overline{\mathrm{A}}=1\) \(\mathrm{Y}_1=\mathrm{AB}=0.1=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=1.1=1\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+1=1\) \(\therefore \quad \mathrm{C}=0+1=1\) (d) \(\mathrm{A}=1, \mathrm{~B}=0, \overline{\mathrm{A}}=0\) Then, \(\mathrm{Y}_1=\mathrm{AB}=1.0=0\) \(\mathrm{Y}_2=\overline{\mathrm{A}} \mathrm{B}=0.0=0\) \(\mathrm{C}=\mathrm{AB}+\overline{\mathrm{A}} \mathrm{B}=0+0=0\)So, here option (c) is correct.
TS EAMCET 31.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151390
In the following logic circuit. \(\mathrm{C}=\mathrm{D}=\mathrm{E}=0\); for what values of \(A\) and \(B\) the output \(Y=1\)
1 Only for \(\mathrm{A}=0, \mathrm{~B}=0\)
2 Only for \(\mathrm{A}=0, \mathrm{~B}=1\)
3 Only for \(\mathrm{B}=1, \mathrm{~A}=0\)
4 For any values of A and B
Explanation:
D Using the De-Margon theorem, \(Y=\overline{\overline{\overline{A \cdot B} \cdot C} \cdot D \cdot E}\) \(Y=\overline{\overline{\bar{A} \cdot \mathrm{B}} \cdot \mathrm{C}}+\overline{\mathrm{D} \cdot \mathrm{E}}\) \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot \mathrm{C}+(\overline{\mathrm{D}}+\overline{\mathrm{E}})\) For any value of \(A, B\), when the value of \(D\) and \(E\) are zero then, \(\mathrm{Y}=\overline{\mathrm{A} \cdot \mathrm{B}} \cdot 0+(\overline{0}+\overline{0})\) \(\mathrm{Y}=0+(1+1)\) \(Y=1\)
TS EAMCET 30.07.2022
Semiconductor Electronics Material Devices and Simple Circuits
151391
The logic operation of the circuit given below is
1 \(\mathrm{OR}\)
2 NAND
3 AND
4 NOR
Explanation:
B \(\mathrm{Y}=\overline{\overline{\mathrm{A}+\mathrm{B}}}=\mathrm{A}+\mathrm{B}\)
TS EAMCET 02.05.2018
Semiconductor Electronics Material Devices and Simple Circuits
151392
The minimum number of 2-input NAND gates required to implement a NOR gate:
1 2
2 3
3 4
4 5
Explanation:
C Trick for number of NAND (or) NOR gate required to make different gate \(\mathrm{X}=\overline{\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}}=\overline{\overline{\mathrm{A}}}+\overline{\overline{\mathrm{B}}}=\mathrm{A}+\mathrm{B}\) {|c|c|c|} | Logic Min. Number of NOR \(\) Min. Number of NAND \(=4\)\)| |---| \( NOT 1 1\) \( AND 2 3\) \( OR 3 2\) \( EX-OR 4 5\) \( EX-NOR 5 4\) \( ( \(\because 4\) No. of NAND gate required to build NOR gate)
